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	<title>Comments on: First FPGA project ideas</title>
	<atom:link href="http://mike.magin.org/2008/02/19/first-fpga-project-ideas/feed/" rel="self" type="application/rss+xml" />
	<link>http://mike.magin.org/2008/02/19/first-fpga-project-ideas/</link>
	<description></description>
	<pubDate>Sun, 05 Sep 2010 04:20:11 +0000</pubDate>
	
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		<title>By: Neo Cambell</title>
		<link>http://mike.magin.org/2008/02/19/first-fpga-project-ideas/comment-page-1/#comment-17749</link>
		<dc:creator>Neo Cambell</dc:creator>
		<pubDate>Wed, 04 Nov 2009 16:06:41 +0000</pubDate>
		<guid isPermaLink="false">http://mike.magin.org/2008/02/19/first-fpga-project-ideas/#comment-17749</guid>
		<description>Very good starting points...

Neo
http://www.expertcore.org</description>
		<content:encoded><![CDATA[<p>Very good starting points&#8230;</p>
<p>Neo<br />
<a href="http://www.expertcore.org" rel="nofollow">http://www.expertcore.org</a></p>
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		<title>By: digitalpbk</title>
		<link>http://mike.magin.org/2008/02/19/first-fpga-project-ideas/comment-page-1/#comment-15749</link>
		<dc:creator>digitalpbk</dc:creator>
		<pubDate>Tue, 14 Jul 2009 04:01:16 +0000</pubDate>
		<guid isPermaLink="false">http://mike.magin.org/2008/02/19/first-fpga-project-ideas/#comment-15749</guid>
		<description>Mike, that's a very interesting project. I always wanted to do something with the LCD's. 
If you are willing to share the verilog code for the sharp LCD's please mail'em to me. Thanks a lot.</description>
		<content:encoded><![CDATA[<p>Mike, that&#8217;s a very interesting project. I always wanted to do something with the LCD&#8217;s.<br />
If you are willing to share the verilog code for the sharp LCD&#8217;s please mail&#8217;em to me. Thanks a lot.</p>
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		<title>By: Michael Magin</title>
		<link>http://mike.magin.org/2008/02/19/first-fpga-project-ideas/comment-page-1/#comment-9396</link>
		<dc:creator>Michael Magin</dc:creator>
		<pubDate>Thu, 11 Dec 2008 17:44:04 +0000</pubDate>
		<guid isPermaLink="false">http://mike.magin.org/2008/02/19/first-fpga-project-ideas/#comment-9396</guid>
		<description>Yes, I expect to spend some time debugging the hardware.  So far, I have a simulator on my computer working, so I can write an assembler and a forth.  I expect that I'll need to instrument the real hardware pretty well to debug any hardware issues.  I expect to learn a bit about what Altera lets you do via the JTAG interface and their design software -- I know it can instantiate a pseudo-logic-analyzer to inspect what's going on in your design.  (Admittedly taking up some space in the FPGA, but with this FPGA, a simple 16 bit CPU shouldn't take up too much space.)

Though, for more software level debugging, I'll probably just load some minimal code that lets me inspect/manipulate memory on the running system via a serial port.  (and eventually from there to a full interactive forth session on the target.)</description>
		<content:encoded><![CDATA[<p>Yes, I expect to spend some time debugging the hardware.  So far, I have a simulator on my computer working, so I can write an assembler and a forth.  I expect that I&#8217;ll need to instrument the real hardware pretty well to debug any hardware issues.  I expect to learn a bit about what Altera lets you do via the JTAG interface and their design software &#8212; I know it can instantiate a pseudo-logic-analyzer to inspect what&#8217;s going on in your design.  (Admittedly taking up some space in the FPGA, but with this FPGA, a simple 16 bit CPU shouldn&#8217;t take up too much space.)</p>
<p>Though, for more software level debugging, I&#8217;ll probably just load some minimal code that lets me inspect/manipulate memory on the running system via a serial port.  (and eventually from there to a full interactive forth session on the target.)</p>
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		<title>By: Michael</title>
		<link>http://mike.magin.org/2008/02/19/first-fpga-project-ideas/comment-page-1/#comment-9394</link>
		<dc:creator>Michael</dc:creator>
		<pubDate>Thu, 11 Dec 2008 17:16:51 +0000</pubDate>
		<guid isPermaLink="false">http://mike.magin.org/2008/02/19/first-fpga-project-ideas/#comment-9394</guid>
		<description>I built a 16 bit CPU a couple of years ago.  It is similar to Tanenbaum's in his Architecture book, but the microcode is all original.  The machine is stack based because I have a friend who loves Forth.  The only advice I have is you will need a way to debug a running system.  In my case, I came up with a single clock step (not single instruction step) and I provided an external mechanism which allowed me to set switchs to output the value of any register (programmer visible or not) to the 7 segment LED's on my Digilent board.  This step was invaluable.</description>
		<content:encoded><![CDATA[<p>I built a 16 bit CPU a couple of years ago.  It is similar to Tanenbaum&#8217;s in his Architecture book, but the microcode is all original.  The machine is stack based because I have a friend who loves Forth.  The only advice I have is you will need a way to debug a running system.  In my case, I came up with a single clock step (not single instruction step) and I provided an external mechanism which allowed me to set switchs to output the value of any register (programmer visible or not) to the 7 segment LED&#8217;s on my Digilent board.  This step was invaluable.</p>
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		<title>By: Abhishek Shrestha</title>
		<link>http://mike.magin.org/2008/02/19/first-fpga-project-ideas/comment-page-1/#comment-4991</link>
		<dc:creator>Abhishek Shrestha</dc:creator>
		<pubDate>Thu, 10 Jul 2008 12:04:24 +0000</pubDate>
		<guid isPermaLink="false">http://mike.magin.org/2008/02/19/first-fpga-project-ideas/#comment-4991</guid>
		<description>Thanks, it would be better to get some more ideas</description>
		<content:encoded><![CDATA[<p>Thanks, it would be better to get some more ideas</p>
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